Method and apparatus for detecting a packet error in a...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction

Reexamination Certificate

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C714S795000, C375S262000, C375S341000

Reexamination Certificate

active

07395492

ABSTRACT:
The need for separate CRC bits is eliminated by taking advantage of what has been determined to be an embedded error detection capability of the tail bits generated by the constituent encoders of a turbo coder to perform error detection following turbo decoding. Specifically, it has been recognized that the tail bits are similar to CRC bits that would be generated by a CRC encoder that uses as its generating polynomial the feedback polynomial used by the turbo encoder. At the turbo decoder, after a final turbo decoding iteration cycle, a check is performed on the decoded systematic information bits by calculating the tail bits from the decoded information bits using that generating polynomial and bit-by-bit comparing the calculated tail bits with the systematic tail bits decoded by the turbo decoder. If a mismatch occurs at one or more bit positions, an error is indicated.

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