Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2005-10-18
2005-10-18
Do, Thuan (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C716S030000, C716S030000
Reexamination Certificate
active
06957407
ABSTRACT:
Detail routing using obstacle carving around terminals. A terminal in an integrated circuit layout object that is separated from an obstacle by less than a spacing specified by a design rule is identified. The obstacle is carved to reduce an area of the obstacle by an overlap between the obstacle and the terminal bloated by the spacing.
REFERENCES:
patent: 6301686 (2001-10-01), Kikuchi et al.
Faatz Cynthia T.
Intel Corporation
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