Method and apparatus for delta modulator and sigma delta...

Coded data generation or conversion – Analog to or from digital conversion – Differential encoder and/or decoder

Reexamination Certificate

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C341S111000, C341S133000, C341S118000, C341S120000, C341S166000, C318S798000

Reexamination Certificate

active

06498572

ABSTRACT:

STATEMENT AS TO RIGHTS TO INVENTIONS MADE UNDER FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT
Not Applicable
REFERENCE TO A “SEQUENCE LISTING,” A TABLE, OR A COMPUTER PROGRAM LISTING APPENDIX SUBMITTED ON A COMPACT DISK
Not Applicable
BACKGROUND OF THE INVENTION
Delta modulators and sigma delta modulators have existed for many years and have potential to be used in a wide range of applications such as communication systems, precision measurement devices, audio systems, and many others. Operation of the delta modulator and sigma delta modulator transforms a band-limited input signal into a one-bit output signal such that output pulse density of the output signals is modulated by the input signal. The transformation process is achieved by oversampling the input signal. Information about these modulators can be easily obtained on World Wide Web, technical notes, and journal publications. See B. P. Agrawal and K. Shenoi,
Design Methodology For Sigma
-
Delta
-
M
, IEEE Trans. Commun., vol. COM-31, pp.360-370, March 1983; J. W. Scott, W. L. C. Giancario, and C. G. Sodini,
A CMOS slope adaptive delta modulator
, in Proc. IEEE Int. Solid-State Circuits Conf., Febuary 1986, pp.130-131; David Jarman,
A Brief Introduction to Sigma Delta Conversion
, Harris Semiconductor Application Note, May 1995; and
ADDA: CD Data Conversion
(last modified Nov. 28, 1999) <http://www.owlnet.rice.edu/~elec301/Projects99/adda/index.html>.
FIG. 1A
shows building blocks for a conventional implementation of a delta modulator
10
. An input signal
12
is received by a summing circuit
14
. The summing circuit
14
also receives integrated output pulses from an integrator
16
. A difference signal from the summing circuit
14
is applied to a quantizer
18
. The quantizer
18
generates an output signal
19
that is applied to the integrator
16
. The output signal
19
generated by the quantizer
18
is a positive pulse when the difference signal is negative. The output signal
19
generated by the quantizer
18
is a negative pulse when the difference signal is positive. An external oversampling clock
11
drives the delta modulator
10
. This illustrates that the output of a delta modulator consists of pulses modulated by the slope of the input signal.
FIG. 1B
shows building blocks for a conventional implementation of a sigma delta modulator
20
. The sigma delta modulator is a modification of the delta modulator. The modification is made to avoid slope overload due to low oversampling ratio. An input
22
is received by a summing circuit
24
. The summing circuit
24
also receives an output signal
29
. A difference signal from the summing circuit
24
is applied to an integrator
26
. An integrated signal from the integrator
26
is applied to a quantizer
28
. The quantizer generates the output signal
29
. An external oversampling clock
21
drives the sigma delta modulator
20
. This illustrates that the output of a sigma delta modulator consists of pulses modulated by the amplitude of the input signal.
FIG. 2
illustrates the measured power of both the output signal and the quantization noise in a conventional implementation of a delta modulator or sigma delta modulator. Here, the oversampling rate determines the frequency range of the quantization noise shown. As can be seen, if oversampling rate is too low, the quantization noise might not be well separated from the desired output signal, and that may seriously affects the quality of the output signal.
Since quantization noise is directly related to oversampling ratios, increasing the oversampling rate is a logical approach to reducing effects of quantization noise. However, as illustrated by
FIGS. 1A and 1B
, conventional implementations of both the delta modulator and the sigma delta modulator require a number of circuit blocks, such as an integrator, a summing circuit, a quantizer, and an external oversampling clock to drive the modulator. To operate all of this hardware at an oversampled rate, which is usually much larger than the input signal bandwidth, requires great circuit complexity. In addition, a higher oversampling ratio requires a higher speed external oversampling clock, which can add a significant or even prohibitive cost. Thus increasing the oversampling rate has not been practical in conventional implementations of the delta an sigma delta modulators. Increasing the order of the modulator can also decrease quantization noise, however, such an approach also increases circuit complexity and tend to result in less stable systems.
For the above reasons, conventional implementations of the delta modulator and sigma delta modulator have limited the use these conceptually elegant devices to low frequency applications.
SUMMARY OF THE INVENTION
According to the invention, oscillating signals are generated from analog signals by providing an analog signal having a variable slope or amplitude to a circuit with a variable operating point and having a transfer function characterized by an unstable operating region bounded by a first and a second stable operating region. The unstable operating region contains a first and a second reference point. The circuit is capable of producing an oscillating signal having a variable duty cycle, the duty cycle increasing as the variable operating point is positioned closer to the first reference point, the duty cycle decreasing as the variable operating point is positioned closer to the second reference point. The variable operating point is positioned substantially within the unstable region to produce the oscillating signal. The positioning of the operating point relative to the first and the second reference points is a function of the variable slope or amplitude of the analog signal. The oscillating signal is capable of being used to directly or indirectly generate a delta modulation or sigma delta modulation signal corresponding to the analog signal.
In a specific embodiment, the oscillating signal comprises a plurality of pulses.
In a specific embodiment, a more positive value of the slope or amplitude of the analog signal corresponds to a closer positioning of the variable operating point relative to one of the first and the second reference points, and wherein a more negative value of the slope or amplitude of the analog signal corresponds to a closer positioning of the variable operating point relative to another of the first and the second reference points.
The invention will be better understood by reference to the following description in connection with the accompanying drawings.


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