Method and apparatus for defining an input state vector that...

Details Method and apparatus for defining an input state vector that... Method and apparatus for defining an input state vector that...

2006-08-01

2006-08-01

Lee, Thomas (Department: 2115)

Electrical computers and digital processing systems: support

Computer power control

C713S320000, C327S544000

Reexamination Certificate

active

07085942

ABSTRACT:
The method defines an input state vector that achieves low power consumption when applied to the circuit inputs of a digital circuit in an idle state. In the method, independent determinations are performed. Each determination defines a respective set of the input states of the input state vector. Any conflict the definitions of any one or more of the input states is resolved in favor of the definition of the one or more of the input states that achieves the lowest idle power consumption when the input state vector incorporating the one or more of the input states in accordance with the definition is applied to the circuit inputs of the digital circuit in the idle state.

REFERENCES:
patent: 188266 (1877-03-01), Croce et al.
patent: 5744996 (1998-04-01), Kotzle et al.
patent: 6081135 (2000-06-01), Goodnow et al.
patent: 6144251 (2000-11-01), Ogawa
patent: 6169419 (2001-01-01), De et al.
patent: 6191606 (2001-02-01), Ye et al.
patent: 6191615 (2001-02-01), Koga
patent: 6275083 (2001-08-01), Martinez et al.
patent: 6357013 (2002-03-01), Kelly et al.
patent: 6366152 (2002-04-01), Takeuchi et al.
patent: 6466492 (2002-10-01), Ikeda
patent: 6784810 (2004-08-01), Falik et al.
patent: 6900666 (2005-05-01), Kursun et al.
A Gate-level leakage power reduction method for ultra-low-power CMOS circuits, by Jonathan P. Halter and Farid N. Najm. IEEE 1997 custom integrated circuits conference.
Estimation of standby leakage power in CMOS circuits considering accurate modeling of transistor stacks, by Zhanping Chen, Mark Johnson, Liqiong Wei, and Kaushik Roy, 1998 ACM.

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