Electrical computers and digital processing systems: memory – Address formation – In response to microinstruction
Reexamination Certificate
2005-08-04
2009-11-10
Kim, Matt (Department: 2186)
Electrical computers and digital processing systems: memory
Address formation
In response to microinstruction
C711S220000
Reexamination Certificate
active
07617382
ABSTRACT:
A method and apparatus for decompressing relative addresses. A compressed relative address is retrieved from one or more micro-operation entries of a micro-operation storage and an uncompressed relative address is reconstructed from the compressed relative address and an instruction pointer (IP) address associated with the head of the micro-operation storage line in which the compressed relative address was stored. IP-relative addresses may be computed in a manner similar to relative branch targets, then compressed and stored in one or more micro-operation entries of a micro-operation storage line to be reconstructed later according to an IP address associated with the respective micro-operation storage line in which their compressed counterpart was stored.
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Ahuja Hitesh
Miller John A.
St. Clair Michael J.
Toll Bret L.
Chery Mardochee
Intel Corporation
Kim Matt
Trop Pruner & Hu P.C.
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