Method and apparatus for decoding forward error correction...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Error/fault detection technique

Reexamination Certificate

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C714S758000

Reexamination Certificate

active

07395495

ABSTRACT:
A method for decoding information received at a network device may include a first decoding process which applies a first algorithm iteratively until a stopping criterion is reached and a second decoding process which may flip a logic state of one or more bits. In one implementation using low density parity check (LDPC) codewords, bits may be flipped after evaluating check nodes having the lowest metrics and/or assessing the parity relationships of bit nodes and/or edges associated with those check nodes. Devices and systems for decoding are also disclosed as well as various other embodiments.

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patent: 6353911 (2002-03-01), Brink
patent: 6518892 (2003-02-01), Shen et al.
patent: 6751770 (2004-06-01), Morelos-Zaragoza
patent: 6757122 (2004-06-01), Kuznetsov et al.
patent: 6888897 (2005-05-01), Nazari et al.
patent: 7103825 (2006-09-01), Yedidia et al.
patent: 7149953 (2006-12-01), Cameron et al.
patent: 2004/0148561 (2004-07-01), Shen et al.

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