Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2000-06-29
2003-07-29
Iqbal, Nadeem (Department: 2184)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
Reexamination Certificate
active
06601196
ABSTRACT:
FIELD OF THE INVENTION
The present invention is related to a method and apparatus for debugging high-speed busses.
ART BACKGROUND
Computer systems commonly make use of busses to transfer data between devices that include processors, storage devices and I/O devices. Many of such busses make use of one or more data lines, which are electrical conductors on which signals are used to transfer data in concert with a clock signal and/or one or more control signals.
Many busses are binary busses that make use of signals that transition between a high and a low voltage level, indicating a binary 1 or 0 value for purposes of transferring information. In the case of such busses, only one device connected thereto is able to transmit data at any one time. However, there is also a growing number of ternary busses that make use of signals that transition among a high, a low and an intermediate voltage level. On such busses, two devices connected thereto are able to transmit data to each other, substantially simultaneously, with each device employing various methods to derive the data being transmitted by the other device. By allowing both devices to substantially simultaneously transmit data, they provide the benefit of nearly doubling the rate at which data is transmitted.
Such ternary busses tend to be “point-to-point” busses, meaning that only two devices are connected to such busses. A high or low level on a given data line indicates that both devices are transmitting a high or low signal, respectively. An intermediate level indicates that one device is transmitting a high signal while the other is transmitting a low signal. However, determining which device is transmitting the high signal and which is transmitting the low signal is not possible to discern from the intermediate level signal, itself. Each device uses the data it is transmitting on each data line to derive the data that the other device is transmitting.
Since, in a ternary bus, each device must use the data it is transmitting to derive the data being received, debugging a bus to diagnose problems or confirm functionality is rendered more difficult. It is not possible for such diagnostic tools as a logic analyzer to monitor the data being transferred between two devices by the simple attachment of probes to the conductors of a bus. Furthermore, an increasing number of busses now transfer data at rates high enough that the attachment of probes to conductors of a bus will alter the electrical and/or timing characteristics of the bus such that data integrity is adversely effected or the functionality of the bus is impaired.
REFERENCES:
patent: 5701409 (1997-12-01), Gates
patent: 5729678 (1998-03-01), Hunt et al.
patent: 5978934 (1999-11-01), Gates
patent: 5978938 (1999-11-01), Kaiser et al.
patent: 6182248 (2001-01-01), Armstrong et al.
patent: 6341358 (2002-01-01), Bagg et al.
patent: 6480978 (2002-11-01), Roy et al.
patent: 6499121 (2002-12-01), Roy et al.
Randy Mooney, et al., “A 900 Mb/s Bidirectional signaling Scheme”, IEEE Journal of Solid-State Circuits, vol. 30, No. 12, Dec. 1995, pp. 1538-1543.
Randy Mooney, et al., “WP 2.4: A 900 Mb/s Bidirectional Signaling Scheme”, ISSCC95/Session 2/Data Communication/Paper WP 2.4, 1995 IEEE International Solid-State Circuits Conference, 3 pgs.
Toshiro Takahashi, et al., “WP 2.5: A CMOS Gate Array With 600Mb/s Simultaneous Bidirectional I/O Circuits”, ISSCC95/Session 2/Data Communications/Paper WP 2.5, 1995 IEEE International Solid-State Circuits Conference, pp. 40-41.
Dabral Sanjay
Khaw Ernest
Self Keith
Senthinathan Ramesh
Yue Chung-Wai
Blakely , Sokoloff, Taylor & Zafman LLP
Intel Corporation
Iqbal Nadeem
LandOfFree
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