Electrical computers and digital processing systems: support – Clock control of data processing system – component – or data...
Reexamination Certificate
2007-01-02
2007-01-02
Du, Thuan (Department: 2116)
Electrical computers and digital processing systems: support
Clock control of data processing system, component, or data...
C713S401000, C713S500000
Reexamination Certificate
active
10286046
ABSTRACT:
Method and apparatus for serial data transfer between at least two modules (10, 12) connected to each other by way of a serial data bus (18) where the data transfer is governed by a clock signal (CLK). The modules (10, 12) each comprise a receiver unit (30) for the reception of the data and a transmitter unit (22) for the transmission of data. The output of a data value by the transmitter unit (22) of one module (12) to another module (10) at the serial data bus (18), and the import of the data value by the receiver unit (30) of the corresponding other module (10) are initiated by slopes of the clock signal (CLK). The clock signal that triggers the transmission of this data value in the one module (12) is delayed via a delay element (38) one pulse repetition period (ΔTP) of the clock signal (CLK).
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Aberl Peter
Eckhardt Ralf
Brady W. James
Du Thuan
Marshall, Jr. Robert D.
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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