Method and apparatus for data movement in a system on a chip

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture

Reexamination Certificate

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C710S100000

Reexamination Certificate

active

08078784

ABSTRACT:
There is provided a system for comprising a plurality of blocks, each block comprising any hardware element and a plurality of segments for providing interconnection of the plurality of blocks. A segment comprises a connector between multiple blocks and other segments and segments are connected via the ports of blocks or other segments. Communications between blocks is packet based, each packet including at least a destination block. The packet includes at least one of data, packet/message identification and padding. Blocks have an associated address. A block has one or more input ports and one or more output ports. Segments include means for routing packets to destinations. Each block and segment includes properties. Properties include one or more of clocks, bandwidth, bit widths, and latencies. The plurality of segments for multiple packets to be active on different segments. A single segment includes a plurality of ports for multiple packets to be active on different ports of the segment.

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patent: 2005/0180437 (2005-08-01), Twomey
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patent: 2007/0260791 (2007-11-01), Saen et al.
patent: 2008/0186321 (2008-08-01), Park et al.
patent: 2008/0270650 (2008-10-01), Bracamontes Del Toro

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