Method and apparatus for data and clock recovery in a...

Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction

Reexamination Certificate

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Reexamination Certificate

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07136446

ABSTRACT:
A method and apparatus for data and clock recovery in a biphase-coded data signal is described, in which the data signal is sampled using a sampling frequency that is greater than twice the bit frequency of the data signal. The bit limits of the data signal are then determined from the sampling values and used to recover the both the data bits and the corresponding bit clock pulse of the data signal.

REFERENCES:
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patent: 4992790 (1991-02-01), Montgomery
patent: 5073904 (1991-12-01), Nakamura et al.
patent: 5574756 (1996-11-01), Jeong
patent: 5953386 (1999-09-01), Anderson
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patent: 0 930 713 (1999-07-01), None
Pieter W. Hooijmans et al., Penalty Free Biphase Linecoding for Pattern Independent FSK Coherent Transmission Systems, Journal of Lightwave Technology, Mar. 8, 1990; pp. 323-328; vol. 8 No. 3; New York, US.

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