Method and apparatus for critical section prediction for...

Electrical computers and digital processing systems: virtual mac – Task management or control

Reexamination Certificate

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C718S104000, C711S150000, C711S152000, C711S156000

Reexamination Certificate

active

07930694

ABSTRACT:
Intelligent prediction of critical sections is implemented using a method comprising updating a critical section estimator based on historical analysis of atomic/store instruction pairs during runtime and performing lock elision when the critical section estimator indicates that the atomic/store instruction pairs define a critical section.

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Kue-Hwan Sihn, Joonwon Lee, Jung-Wan Cho; A Speculative Coherence Scheme using Decoupling Synchronization for Multiprocessor Systems; pp. 1-4; IEEE 2003.
Ravi Rajwar; Speculation-Based Techniques for Transactional Lock-Free Execution of Lock-Based Programs; University of Wisconsin—Madison 2002; pp. 1-209.
Rajwar, et al., “Speculative Lock Elision: Enabling Highly Concurrent Multithreaded Execution”,The Proceedings of the 34thInternational Symposium on Microarchitecture(MICRO), Dec. 3-5, 2001.

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