Method and apparatus for creating a load module and a...

Details Method and apparatus for creating a load module and a... Method and apparatus for creating a load module and a...

2006-10-03

2006-10-03

Peikari, B. James (Department: 2189)

Electrical computers and digital processing systems: memory

Storage accessing and control

Shared memory area

C711S139000, C711S156000, C711S152000, C711S151000, C718S106000, C718S101000, C710S240000, C710S040000

Reexamination Certificate

active

07117315

ABSTRACT:
Data shared by plural processes of a program are identified and identification information is affixed to the shared data. When the program is linked by a linker, only the shared data to which identification information is affixed are extracted and a shared data area is created for the shared data. During program execution, this shared data area is prevented from being and the main memory is referred to or updated or the cache is invalidated prior to access of the shared data area by the linker. An address of data in a processor is computed from an address of the data in another processor based on a specific expression.

REFERENCES:
patent: 5742790 (1998-04-01), Kawasaki
patent: 6594728 (2003-07-01), Yeager
patent: 6600677 (2003-07-01), Afghahi et al.
patent: 6704822 (2004-03-01), Tremblay et al.

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