Method and apparatus for correction of GPS carrier phase measure

Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction

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375371, H03D 324

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active

056639929

ABSTRACT:
The output phase measures output by a digital phase lock loop (DPLL) are selectively modified to reduce instantaneous phase errors incurred whilst waiting until the DPLL locks before obtaining an accurate phase measurement of a signal. In one embodiment, the output phase of a low bandwidth DPLL is selectively modified when the input signal exhibits a significant dynamic transient by adding the error term generated by the DPLL phase detector to the output signal generated by the DPLL to generate a modified output signal used to perform phase measurements.

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