Method and apparatus for correcting misaligned instruction data

Details Method and apparatus for correcting misaligned instruction data Method and apparatus for correcting misaligned instruction data

1996-07-16

1998-09-01

Coleman, Eric

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

39580023, G06F 9315

Patent

active

058025561

ABSTRACT:
In a microprocessor having a plurality of execution units, rename register, architectural registers, and a cache for storing blocks of data, each block having a plurality of words, a method for aligning bytes stored in separate words. In one version, the method includes the steps of reading a first word of data from the cache; rotating the first word to align a first byte with respect to a first byte of a rename register; storing the first aligned byte in the rename register; reading a second word from the cache; rotating the second word to align a second byte with respect to a second byte of the rename register; and storing the second aligned byte in the rename register.

REFERENCES:
patent: 5497493 (1996-03-01), Colwell
patent: 5560032 (1996-09-01), Nguyen
patent: 5577200 (1996-11-01), Abramson
patent: 5615385 (1997-03-01), Fetterman
patent: 5630149 (1997-05-01), Bluhm
patent: 5655097 (1997-08-01), Witt

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