Method and apparatus for coordinating the configuration of...

Electrical computers and digital processing systems: support – Digital data processing system initialization or configuration

Reexamination Certificate

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C700S004000, C712S028000, C709S209000, C709S224000

Reexamination Certificate

active

06519697

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to parallel processing systems, and in particular to a method and system for configuring a massively parallel processing system.
2. Description of the Related Art
Parallel processing is considered an advantageous approach for increasing processing speeds in computer systems. Parallel processing can provide powerful communications and computer systems which can handle complex problems and manipulate large databases quickly and reliably.
One example of parallel processing can be found in U.S. Pat. No. 4,412,285, issued Oct. 25, 1983, to Neches et al., incorporated by reference herein. This patent describes a system using a sorting network to intercouple multiple processors so as to distribute priority messages to all processors. Another example of parallel processing can be found in U.S. Pat. No. 5,321,813 issued Jun. 14, 1994 to McMillen et al., which reference is also hereby incorporated by reference herein.
One of the difficulties associated with parallel processing systems involves the logical configuration of such systems. Prior art parallel processing systems are typically configured with the use of five inter-dependent services for: (1) registering nodes, (2) examining local and global net states, (3) merging global parallel processing info with local info, (4) freezing the selected parallel processing configuration, and (5) selecting or dropping parallel processing nodes. On very large systems, these methods can be unreliable. Further, in some cases, use of these methods can render some of the drivers and interfaces of the massively parallel processing system unusable.
From the foregoing, it can be seen that there is a need for a simplified method for logically configuring a parallel processing system. The present invention satisfies this need.
SUMMARY OF THE INVENTION
To address the requirements described above, the present invention discloses a simplified method, apparatus, and article of manufacture for configuring a parallel processing system.
The present invention uses a technique whereby the nodes cast votes to detect which node is the best coordinator. Each node in the system maintains two tables describing the best expected configuration, and the best node to be the coordinator. The tables are compared to each incoming vote and are updated to reflect the best possible choice. Each node then uses these tables when casting future votes. The coordinating node is determined when all the nodes reach a consensus, or when any node determines which one should be the coordinating node.
More specifically, the method comprises the steps of multicasting a first set of desired nodes and a first set of reachable nodes from the local node; receiving a remote set of desired nodes and a remote set of reachable nodes from a remote node; setting the first set of desired nodes to the remote set of desired nodes when the remote set of desired nodes has more members than the first set of desired nodes; setting the first set of reachable nodes to the remote set of reachable nodes and selecting the remote node as the candidate coordinator node when the remote set of reachable nodes has more members than the first set of desired nodes; selecting the candidate coordinator node as the node originating the first set of reachable nodes. The foregoing steps are repeated for all remote nodes in the first set of desired nodes. If the first set of reachable nodes includes all nodes in the first set of desired nodes, the candidate coordinator node is selected as the coordinator node. If no node can reach all of the nodes in the first set of desired nodes, the node that can reach the greatest number of the desired nodes is selected as the coordinator node.
The apparatus comprises a means for performing the steps described above, and the article of manufacture comprises a program storage device tangibly embodying computer instructions for performing the above method steps.
Using the steps outlined above, this definition and use of the coordinator node use of the above invention allows a parallel processing system to be configured with fewer operations and fewer configuration services than possible in the prior art. Specifically, the number of configuration services to be reduced from five to two (one for selecting the coordinator, and the second for configuring the parallel processing system), simplifying software and hardware design, and improving maintainability and reliability as well.


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