Method and apparatus for converting IEEE 1284 signals to or...

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture

Reexamination Certificate

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C710S313000

Reexamination Certificate

active

06643728

ABSTRACT:

TECHNICAL FIELD
The present invention relates generally to communications protocol converters and is particularly directed to an IEEE 1284-to-IEEE 1394 converter of the type which interfaces to a printer. The invention is specifically disclosed as a 1284-to-1394 converter that interfaces to a host computer on the 1284 bus and a printer or other digital peripheral device on the 1394 bus, and also as a peer-to-peer IEEE 1394-to-IEEE 1284 converter that interfaces between a printer having a 1284 port and a digital device on the 1394 bus.
BACKGROUND OF THE INVENTION
The IEEE 1394 bus is a low cost, high performance serial interface that will eventually replace the parallel port, SCSI, and other communications interfaces on peripheral devices, such as printers. It also allows for peripheral-to-peripheral connections without a host PC. A printer having a 1394 port could directly interface with some of the new digital peripherals, such as the digital cameras.
The IEEE 1394 protocol generally requires a Physical layer (also called the “Phy”), a Link layer, and a microcontroller interface for asynchronous data transfer. The Phy handles both the transmitting and the receiving of analog signals transmitted across the 1394 bus. When receiving data the Phy converts the data into a clock digital format needed for the Link layer. When sending data, the Phy takes clock digital data from the Link layer, and converts it into the analog format needed for the IEEE 1394 bus.
U.S. Pat. No. 5,815,509 (by Deng) discloses a method for testing memory in an interface system that couples a parallel host bus to a serial IEEE 1394 bus. The interface controls transmission of data from the parallel host bus to the IEEE 1394 serial bus, and to control reception of data by the parallel bus from the serial bus. One primary objective of the invention is to be able to test memory in the interface system that couples the parallel host bus to the serial bus. The Deng system includes a random access memory, a transmission control unit to control data sent from the parallel host bus to the serial bus, a reception control unit that controls reception of data at the parallel bus from the serial bus, and a “test unit” that selectively controls the RAM to internally generate addresses and later selectively relinquish control of the RAM to allow transmission of data between the serial bus and the parallel bus.
U.S. Pat. No. 5,875,313 (by Sescila) discloses a bus translator between a PCI bus to an IEEE 1394 bus, used for coupling a PCI device to a host computer via the IEEE 1934 bus. The translator can translate addresses of PCI bus cycles initiated by the PCI device into 1394 memory addresses and performs data transfers between the PCI device and host computer using the translated 1394 memory addresses. It also translates 1394 memory addresses of 1394 request packets received from the host computer into PCI cycle addresses and performs data transfers between the PCI device and host computer by initiating PCI bus cycles targeted at the PCI device using the translated PCI bus cycle addresses. The main thrust of this invention is to provide some type of test instrument on a PCI chassis, in which the PCI to 1394 translator is plugged into this PCI chassis. The serial IEEE 1394 bus is used to connect to a host computer. An example of the test instrument is an oscilloscope, multimeter, pressure sensor, or data acquisition device.
U.S. Pat. No. 5,815,678 (by Hoffmnan) discloses a high-level application programming interface that allows digital data to be transported over an IEEE 1394 serial bus. The application programming interface (API) is connected to a “Transaction Layer,” “Link Layer,” and “Physical Layer,” before reaching the IEEE 1394 physical interface. The “host unit” has a “host bus” which also could be an IEEE 1394 bus, or could be any other bus protocol. In one example of a product development environment, two different PC's are connected to one another by an IEEE 1394 cable, and one computer is a printer simulator while the other computer is the printer driver being developed. Another example discloses a PC having printer driver test code that is connected to a physical printer by an IEEE 1394 cable, in which the printer has an IEEE 1394 interface and its software is in development. According to Hoffman, the computer could then exercise all functions of the printer using the IEEE 1394 connection, including the use of a word processor to send true printer data to the printer for a final evaluation.
U.S. Pat. No. 5,793,366 (by Mano) discloses a graphical user interface that displays graphical images representing devices coupled to a serial bus structure, preferably an IEEE 1394 bus. When a device is added to the serial bus, a graphical image representing that device is automatically displayed on the graphical user interface monitor. Tasks performed by devices coupled to the serial bus are also controlled and monitored by the user through the graphical user interface. When a device is added to the serial bus, an animated stream of data temporarily flows between the graphical image of the new device and the computer system. A “video printer” is depicted as being one of the devices that can be connected to the IEEE 1394 serial bus, and can be directly coupled to a digital camera via the 1394 serial bus.
Converters between a parallel bus and an IEEE 1394 (serial) bus have been available, but the designer typically has available chip-level or board-level components that are integrated only to a certain extent. For example, Physical layer chips are already available as a standard part, and Link layers are also available as a standard chip. However, these separate components can be better utilized if integrated into a unitary system of low component count that includes the necessary intelligence to provide handshaking between the 1284 bus and the Link layer.
SUMMARY OF THE INVENTION
Accordingly, it is a primary advantage of the present invention to provide a 1284-to-1394 converter that is highly integrated and performs handshaking between the 1284 bus and a Link layer, and provides interfacing between the 1394 bus, a Physical layer, and the Link layer.
It is another advantage of the present invention to provide a highly integrated 1284-to-1394 converter that interfaces between a host computer via a 1284 bus and a peripheral device such as a printer or digital camera via a 1394 bus, in which the 1284 bus communicates with a Link layer, and the 1394 bus communicates via a Physical layer.
It is yet another advantage of the present invention to provide highly integrated 1284-to-1394 converter that interfaces between a host computer via a 1284 bus and a peripheral device such as a printer or digital camera via a 1394 bus, in which the 1284 bus communicates with a Link layer that is embedded within an ASIC that also contains controller logic.
It is a further advantage of the present invention to provide a peer-to-peer 1394-to-1284 converter that is highly integrated and provides interfacing between the 1394 bus, a Physical layer, and a Link layer, and further provides a peripheral interface to a 1284 bus and performs handshaking between the 1284 bus and the Link layer.
It is a yet further advantage of the present invention to provide a highly integrated peer-to-peer 1394-to-1284 converter that interfaces between a first peripheral device such as a printer via a 1284 bus and a second peripheral device such as a digital camera via a 1394 bus, in which the 1284 bus communicates with a Link layer, and the 1394 bus communicates via a Physical layer.
It is still a further advantage of the present invention to provide highly integrated peer-to-peer 1394-to-1284 converter that interfaces between a first peripheral device such as a printer via a 1284 bus and a second peripheral device such as a digital camera via a 1394 bus, in which the 1284 bus communicates with a Link layer that is embedded within an ASIC that also contains controller logic.
Additional advantages and other novel features of the invention will be set forth in part

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