Abrading – Precision device or process - or with condition responsive... – With indicating
Reexamination Certificate
2000-07-28
2003-07-15
Eley, Timothy V. (Department: 3724)
Abrading
Precision device or process - or with condition responsive...
With indicating
C451S041000, C451S063000, C451S288000
Reexamination Certificate
active
06592429
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to semiconductor device manufacturing, and, more particularly, to a method and apparatus for controlling wafer uniformity in a chemical mechanical polishing tool using carrier head signatures.
2. Description of the Related Art
Chemical mechanical polishing (CMP) is a widely used means of planarizing silicon dioxide as well as other types of layers on semiconductor wafers. Chemical mechanical polishing typically utilizes an abrasive slurry disbursed in an alkaline or acidic solution to planarize the surface of the wafer through a combination of mechanical and chemical action. Generally, a chemical mechanical polishing tool includes a polishing device positioned above a rotatable circular platen or table on which a polishing pad is mounted. The polishing device may include one or more rotating carrier heads to which wafers may be secured, typically through the use of vacuum pressure. In use, the platen may be rotated and an abrasive slurry may be disbursed onto the polishing pad. Once the slurry has been applied to the polishing pad, a downward force may be applied to each rotating carrier head to press the attached wafer against the polishing pad. As the wafer is pressed against the polishing pad, the surface of the wafer is mechanically and chemically polished.
Generally, within-wafer uniformity variations (i.e., surface non-uniformity) are produced by slight differences in polish rate at various positions on the wafer.
FIG. 1
illustrates two radial profiles of surface non-uniformity typically seen after an oxide polish of a wafer. The dished topography is often referred to as a center-fast polishing state because the center of the wafer polishes at a faster rate than the edge of the wafer. The domed topography is designated center-slow because the center of the wafer polishes at a slower rate than the edge of the wafer. For obvious reasons, the dished topography may also be referred to as edge-slow, and the domed topography may also be referred to as edge-fast.
Commonly, each carrier head in a CMP tool has unique characteristics that cause the wafers it processes to have similar topographies. For example, a particular carrier head is more likely to produce all dished or domed wafers. Due to the multiplicity of carrier heads in a CMP tool, polished wafers in a given lot will have different post-polish topographies. Subsequent processes performed on the wafers, such as photolithography and etch processes, are affected by variations in the thickness of the polished layer on the wafer. The operating parameters of the subsequent processes are selected such that the process will work for either a domed or a dished topography. Such a compromise approach increases the variation in the processed wafers, because the acceptance ranges must be widened to account for the different input topologies. Generally, increased process variation results in lower profitability.
The present invention is directed to overcoming, or at least reducing the effects of, one or more of the problems set forth above.
SUMMARY OF THE INVENTION
One aspect of the present invention is seen in method for controlling wafer uniformity in a polishing tool. The method includes providing a plurality of carrier heads, determining a signature for each of the carrier heads, and installing carrier heads with similar signatures in a polishing tool.
Another aspect of the present invention is seen in a processing line including a polishing tool and a processing tool. The polishing tool is adapted to polish wafers. The polishing tool includes a plurality of carrier heads, each carrier head having a polishing signature similar to the other carrier heads. The processing tool is adapted to process the polished wafers in accordance with a recipe. At least one parameter in the recipe is based on the polishing signatures of the carrier heads.
REFERENCES:
patent: 5609719 (1997-03-01), Hempel
patent: 6241585 (2001-06-01), White
patent: 6244932 (2001-06-01), Govzman et al.
patent: 6244935 (2001-06-01), Birang et al.
patent: 0727807 (1996-08-01), None
patent: 0827193 (1998-03-01), None
patent: 0951963 (1999-10-01), None
International Search Report dated Feb. 8, 2002 for International application No. PCT/US01/21142 Filed Jul. 3, 2001.
Advanced Micro Devices , Inc.
Eley Timothy V.
Williams Morgan & Amerson P.C.
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