Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate
2011-04-12
2011-04-12
Tsai, Sheng-Jen (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
C711SE12001
Reexamination Certificate
active
07925853
ABSTRACT:
An information handling system includes a processor with an array power management controller. The array power management controller gates off a memory array, such as a cache, to conserve power whenever a group of instructions in a branch instruction queue together as a group exhibits a confidence in the accuracy of branch predictions of branch instructions therein that is less than a first predetermined threshold confidence threshold. In one embodiment of the information handling system, the array power management controller speculatively inhibits the gating off of the memory array when confidence in the accuracy of a branch prediction for a particular currently issued branch instruction exhibits less than a second predetermined threshold confidence threshold. In this manner, the array power management controller again allows access to the memory array in the event a branch redirect is likely.
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Gschwind Michael Karl
Philhower Robert Alan
Yeung Raymond Cheung
International Business Machines - Corporation
Kahler Mark P
Talpis Matt
Tsai Sheng-Jen
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