Method and apparatus for controlling impedance

Details Method and apparatus for controlling impedance Method and apparatus for controlling impedance

1998-06-29

2000-12-05

Tokar, Michael

Electronic digital logic circuitry

Interface

Current driving

326 30, H03K 1716, H03K 19003

Patent

active

061572152

ABSTRACT:
A passive resistive element is provided in series with a digital variable impedance to produce a highly linear output impedance for a transmission path over a wide range of operating conditions.

REFERENCES:
patent: 4719369 (1988-01-01), Asano et al.
patent: 4760292 (1988-07-01), Bach
patent: 5243229 (1993-09-01), Gabara et al.
patent: 5457407 (1995-10-01), Shu et al.
patent: 5726589 (1998-03-01), Cahill et al.
U.S. application Ser. No. 09/083,172, Gabara et al., Filed May 22, 1998.
Gabara et al., "Digitally Adjustable Resistors in CMOS for High-Performance Applications", IEEE Journal of Solid State Circuits, vol. 27, No. 8, Aug. 1992, pp. 1176-1185.
Gabara et al., "Forming Damped LRC Parasitic Circuits in Simultaneously Switched CMOS Output Buffers", IEEE Journal of Solid State Circuits, vol. 32, No. 3, Mar. 1997, pp. 407-417.

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