Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2008-07-15
2011-11-15
Bragdon, Reginald (Department: 2189)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S118000, C711S159000, C711SE12022, C714S003000
Reexamination Certificate
active
08060698
ABSTRACT:
A cache controller controls at least one cache. The cache includes ways including a plurality of blocks that stores therein entry data. A writing unit writes degradation data to a failed block. The degradation data indicates that the failed block is in a degradation state. A reading unit reads entry data from a block. A determining unit determines, if the entry data obtained by the reading unit includes the degradation data, that the block is in the degradation state.
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Japanese Office Action for corresponding Japanese Application 2008-501571; mailed Apr. 7, 2009.
Kusachi Souta
Morita Kuniki
Okawa Tomoyuki
Ukai Masaki
Bragdon Reginald
Fujitsu Limited
Fujitsu Patent Center
Loonan Eric
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