Method and apparatus for configuring an integrated circuit

Details Method and apparatus for configuring an integrated circuit Method and apparatus for configuring an integrated circuit

2008-02-27

2009-12-01

Le, Don P (Department: 2819)

Electronic digital logic circuitry

Reliability

C326S038000

Reexamination Certificate

active

07626415

ABSTRACT:
A configuration management system is disclosed. For example, an embodiment of the present invention provides a configuration management system comprising a configuration storage device containing configuration data, and an integrated circuit, coupled to the configuration storage device, where the integrated circuit comprising at least one configuration management controller for managing a configuration of the integrated circuit in accordance with the configuration data, where the integrated circuit is deployed in a radiation tolerant device.

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XAPP1004 (v1.2 ) Mar. 14, 2008, Miller, G., et al., Single-Event Upset Mitigation Design Flow for Xilinx FPGA PowerPC Systems, pp. 1-9, Xilinx, Inc. 2100 Logic Drive, San Jose, CA 95124.
XAPP989 (v1.2 ), Apr. 2, 2008, Carmichael, C. et al. “Correcting Single-Event Upsets with a Self-Hosting Configuration Management Core”, pp. 1-9, Xilinx, Inc. 2100 Logic Drive, San Jose, CA 95124.
XAPP988 (v1.0) Mar. 13, 2008, Carmichael, Carl, et al., entitled “Correcting Single-Event Upsets in Virtex-4 Platform FPGA Configuration Memory”, 1-21 pages, Xilinx, Inc., 2100 Logic Drive, San Jose, CA.
XAPP779 (v1.1) Feb. 19, 2007, Bridgford, Brendan, et al., entitled “Correcting Single-Event Upsets in Virtex-II Platform FPGA Configuration Memory”, 1-19 pages, Xilinx, Inc., 2100 Logic Drive, San Jose, CA.
U.S. Appl. No. 12/038,763, filed Feb. 27, 2008, Tseng, C.W., et al., “Method and Apparatus for Configuring An Integrated Circuit”, Xilinx, Inc. 2100 Logic Drive, San Jose, CA 95124.

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