Electrical computers and digital processing systems: support – Digital data processing system initialization or configuration
Reexamination Certificate
2000-02-18
2003-04-08
Heckler, Thomas M. (Department: 2185)
Electrical computers and digital processing systems: support
Digital data processing system initialization or configuration
C710S010000
Reexamination Certificate
active
06546483
ABSTRACT:
FIELD OF THE INVENTION
The invention relates generally to methods and apparatus for initializing devices, and more particularly to methods and apparatus for configuring, through a system bios or other boot up code, a device that is initially assigned to a dedicated address space.
BACKGROUND OF THE INVENTION
Operating systems typically use system bios to initialize peripheral devices such as graphics processors and other peripheral devices. Some processing systems require that certain peripheral devices be assigned fixed address space by the operating system. These resources include, for example, I/O address space and memory address space. Because the address space is fixed, typically only one peripheral device assigned to that address space can be initialized even though multiple members of the same device can be installed since at any one time only one peripheral device can be assigned to the fixed address space. For example, as described in an Intel processor based computer system, a VGA graphics controller is assigned to a fixed address space. For all PCI compliant devices, the implementation of PCI Configuration Space is a must requirement. The PCI configuration space has 256 bytes and its registers has a specific record structure. One type of configuration space layout is described, for example, in Chapter 6 of PCI Local Bus publication, pp. 185-218 (1998).
As known in the art, VGA graphics controllers typically require the following resources: I/O addresses: 3B4h, 3B5h, 3BAh, 3C0H, 3C1h, 3C2h, 3C3H, 3C4h, 3C5h, 3CEh, 3CFh, 3D4h, 3D5h, 3DAh; memory location: 128K bytes at 0A0000h-0BFFFFh and ROM location: typically below 1 megabyte in a range of 0C0000h-CFFFFh but can be located anywhere in memory depending on implementation. For PCI devices, there is a subclass code (0Ah) in the PCI configuration space. The subclass code is a read only register and it identifies the type of device installed in the system. For VGA graphics controllers, the class code (0Bh) is 3 and the subclass code is 00000h. For a graphics controller with the VGA resources disabled, the subclass code is 080h. The class code register contains the subclass code bit containing the information bit register which contains bits representing, for example, a function of the peripheral device and type of peripheral device. If the VGA graphics class code is 3 and the subclass code is 0, the graphics processor indicates that its requires the I/O addresses and memory location described above. These address locations are fixed and cannot be changed through the class code register or the subclass code bit.
In the PCI configuration space, the class code register indicates if the installed device is a VGA graphics processor. This information is typically examined by the system bios by reading the configuration space registers as provided by the peripheral device. With multiple VGA graphics controllers installed in a system, only one set of VGA address space can be assigned to any one of the VGA controller. All the other VGA controllers have to be disabled by the system bios through the PCI configuration space because only one VGA address space can be provided by the system. Accordingly, if there are multiple VGA controller is installed in the system, only one VGA controller gets initialized and is booted up. The initialization of the secondary VGA controller has to be initialized by an application driver after the operating system is fully operational. Accordingly, different application drivers must be written for different operating systems. The initialization includes the programming of the graphics controller as a whole to a specific state and to disable the VGA processor portion of the graphics controller in order to avoid any resource conflict. The mechanism in which the secondary VGA controller is disabled is proprietary as is different for different hardware manufacturers. This can create unnecessary expenses since the application driver would have to typically be updated whenever hardware requires a different setting. As a result, the system bios only enables one VGA processor although two or more may be desired. In addition, older video programs may use VGA processing and it is desirable to accommodate these older technology processing capabilities to allow a system user to run older programs. However, a problem arises when multiple VGA processors are desired in a common system due to their fixed address space requirements.
Accordingly, a need exists for a method and apparatus for configuring a device that requires dedicated address space to allow the relocation of the dedicated resources or disabling the legacy portion of the device through, for example, PCI configuration registers while maintaining compatibility with legacy requirements. This method is universal to all VGA controllers and no proprietary programming is required for all VGA controller manufacturers.
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PCI Local Bus publication, Chapter 6, “Configuration Space”, pp. 185-218 (1998).
ATI International Business SRL
Heckler Thomas M.
Vedder Price Kaufman & Kammholz
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