Method and apparatus for concurrent and independent data...

Details Method and apparatus for concurrent and independent data... Method and apparatus for concurrent and independent data...

2005-03-31

2009-10-13

Ellis, Kevin L (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

C710S005000, C710S065000, C710S074000, C711S112000

Reexamination Certificate

active

07603514

ABSTRACT:
An access detector detects an access type of an access to one of a plurality of serial ports interfacing to serial storage devices. The access is intended to one of a plurality of parallel channels interfacing to parallel storage devices via task file registers of the parallel channels. A mapping circuit maps the serial ports to the parallel channels. A state machine emulates a response from the one of the parallel channels based on the access type and the mapped serial ports.

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