Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2006-08-22
2006-08-22
Dildine, R. Stephen (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S785000
Reexamination Certificate
active
07096408
ABSTRACT:
A method and apparatus for performing quickly and efficiently generating the error correction polynomial. In accordance with the present invention, multiple coefficients of the syndrome vector are processed in parallel by a Berlekamp algorithm logic block of the present invention. The Berlekamp algorithm's iterations can be performed in less than 60 clock cycles for a large order error correction polynomial, thereby enabling the polynomial to be generated very rapidly. In order to perform the Berlekamp algorithm at such a high rate of speed, Galois field multiplier logic is utilized in performing the algorithm. Furthermore, because of the large number of logical multiplication and addition operations that are performed in parallel, the Galois filed multiplier logic in accordance with the preferred embodiment of the present invention is configured in such a way that redundancy in processing polynomial coefficients is greatly reduced, which enables the number of logic gates needed to implement the Galois field multiplier logic to be vastly reduced. This reduction in the number of gates used for this purpose reduces area and power consumption requirements.
REFERENCES:
patent: 4162480 (1979-07-01), Berlekamp
Anonymous; Method for in-band error correction for SDH/SONET optical-networks using Reed-Solomon RS(244,240,9) algorithms; Jun. 24, 2002; ip.com; only pp. 1-14 cited (pp. 15-17 are blank); URL: https://priorart.ip.com/download/IPCOM000008573D.zip.
Heydtmann, A.E.; Jensen, J.M.; On the equivalence of the Berlekamp-Massey and the Euclidean algorithms for decoding; Information Theory, IEEE Transactions on; vol. 46, Issue 7, Nov. 2000; pp. 2614-2624.
Hassell, C. A. and Paranjape, S. M.; Berlekamp-Massey Decoder Implementation; Nov. 1995; vol. 38, No. 11; pp. 227-230.
Ireland Howard H.
Nichols Jeffery T.
Bernard Christopher L.
Brown Tyler S.
CIENA Corporation
Dildine R. Stephen
Dougherty & Clements
LandOfFree
Method and apparatus for computing the error locator... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and apparatus for computing the error locator..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for computing the error locator... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3643409