Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1996-04-03
1998-06-09
Chan, Eddie P.
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
711137, 711158, 395859, 395860, G06F 1208
Patent
active
057651892
ABSTRACT:
A system manages data transfer between a computer, a data storage disk, and a data buffer which is associated with the disk. Upon receipt of a write request during data read-ahead from the disk to the buffer, the system preempts the read-ahead to write the data to the disk only when the target write track on the disk is different from the track being read ahead into the buffer. Otherwise, the system permits read-ahead to continue until the target write sector is positioned beneath the disk drive head. Also, upon receipt of a read request during cache writing from the buffer to the disk, the system immediately satisfies the read request prior to completing the cache writing when the requested read data is contained in the buffer. Moreover, the system provides for dynamic switching between a data read-ahead preempt policy and a data read-ahead no-preempt policy based upon parallel monitoring and comparison of data request service times under both policies.
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Haswell Jonathan Mark
Ng Spencer Wah-Fung
Treiber Richard Kent
Yamaguchi Mario
Chan Eddie P.
International Business Machines - Corporation
Nguyen Hiep T.
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