Method and apparatus for compound hardware configuration...

Electrical computers and digital data processing systems: input/ – Input/output data processing – Peripheral configuration

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C710S015000, C710S016000, C710S104000, C713S001000, C713S100000, C709S220000, C709S221000, C709S222000, C709S223000, C709S224000, C709S249000, C370S254000, C379S219000

Reexamination Certificate

active

06385668

ABSTRACT:

FIELD OF THE INVENTION
This invention relates generally to systems having multiple hardware elements and in particular to computerized systems having a distributed architecture in which system functionality is distributed among a plurality of subordinate hardware elements, and is more particularly directed toward computerized systems in which reconfiguration and maintenance of the subordinate hardware elements is routinely performed.
BACKGROUND OF THE INVENTION
The earliest electronic systems, such as the first digital computers, included only one level of intelligence. The first computers, in other words, included a single central processing module that performed all computer operations. Memory devices and input/output (I/O) devices were generally connected to the central processing module via address, data, and control bus structures that allowed for complete control of these additional computer system elements by the central processing module.
As computer systems evolved, and processor elements became cheaper and more widely available, there was a general trend toward the implementation of intelligent subordinate modules that could perform certain elementary tasks, thus freeing up the central processing resource for primary computation. This distribution of system intelligence began with the development of the intelligent I/O processor, and spread quickly into other areas of computer system design. Once it became possible to include a fairly high level of intelligence within a particular subordinate system element, a degree of independence was achieved that made it unnecessary for a complete address, data, and control bus structure to be extended to every subordinate element. All that was generally required was the establishment of a simple interface that permitted exchange of data, control and status information between the central processor and the subordinate module or peripheral. These interfaces often took the form of serial busses for the sake of hardware economy.
Once the independence of subordinate modules was clearly established, development of new and improved intelligent peripherals became widespread and competitive. Although consequent price reductions and improved performance benefited system purchasers, the central processor was steadily losing control of the peripherals. Although this loss of control was consistent with the pervasive notion of distributed architectures, and did not generally cause problems with system operation, an increasing lack of commonality between the core processor units and the peripheral devices within a system began to cause problems with system configuration and maintenance, since these were functions that the core processor, of necessity, needed to retain.
The distributed architecture continued to invade electronic systems generally, rather than being restricted to computer systems in particular. In telecommunications switching, for example, an electronic switching system can be viewed as a massively distributed system with one or more central processing resources in communication with a plurality of subordinate hardware elements, each with one or more processors of its own. Although such distribution of computing power results in performance enhancements in terms of speed and economy of execution for telecommunications switching applications, it also gives rise to problems of its own.
The subordinate modules that perform telecommunications signal processing are constantly being upgraded to perform more complex operations more quickly. When a telecommunications switch is first placed in service, there are certain family relationships among the central processing modules and the subordinate modules that streamline the maintenance and reconfiguration functions that must often be performed in telecommunications equipment. As the subordinate modules are improved and enhanced, these family relationships are sometimes changed or degraded in the name of progress. Maintenance and configuration operations must still be performed, however, often by legacy software that is at the heart of the system. It is often impossible to replace or upgrade the highest level software often enough to take into account the improved capabilities of newly introduced subordinate modules.
Accordingly, a need arises for a technique that allows legacy software to cope effectively with changing hardware relationships introduced by new hardware elements.
SUMMARY OF THE INVENTION
These needs and others are satisfied by the method and apparatus of the present invention, in which hardware reconfiguration is accomplished through the use of low-level, self-terminating software processes that allows a high degree of parallelism in the reconfiguration operation, even in systems utilizing a mixture of recently developed hardware and software in combination with legacy components.
According to the invention, in a system including a centralized processor resource and a plurality of interconnected hardware elements, a method is provided for performing hardware reconfiguration, the method comprising the steps of receiving a request for reconfiguration of one or more predetermined hardware elements, and, in response thereto, initiating a master terminal process to determine family relationships among the predetermined hardware elements and other hardware elements to which the predetermined hardware elements are connected. Based upon these family relationships, slave terminal processes are initiated to accomplish hardware element reconfiguration. The step of receiving a request may comprise to receiving a request for hardware reconfiguration at a system process of the centralized processor resource via a predetermined messaging protocol. Determining family relationships comprises determining the degree of dependence of subtending hardware elements on the modules to which they subtend.
The step of initiating the master terminal process to determine family relationships further comprises the steps of invoking a master terminal process and supplying at least one parameter identifying hardware elements to be reconfigured, and, at the master terminal process, calling a software primitive to access an associated data base, acquire stored information relating to the hardware elements to be reconfigured, and determine fly relationships among the hardware elements to be reconfigured and other hardware elements to which the hardware elements to be reconfigured are connected.
In accordance with one aspect of the invention, the associated data base includes both static and dynamic information. Static information includes data related to physical characteristics of the hardware elements. These physical characteristics include type of hardware element and points of physical connection to other hardware elements. Dynamic information includes data related to status of hardware elements, particularly operational status. If the hardware element is not operational, hardware status includes information relating to hardware defects.
In one form of the invention, degree of dependence is defined by assigning a relationship to each hardware element selected from the set of relationships consisting of dedicated, delegated, and acquired. A dedicated relationship is a relationship that includes hardware elements subtending to an element originally requested for reconfiguration that must be reconfigured by the master terminal process. A delegated relationship is a relationship that includes hardware elements subtending to an element originally requested for reconfiguration that is reconfigured by a slave terminal process. An acquired relationship is a relationship that includes hardware elements that are not dedicated or delegated, and for which a slave process is willing to assume responsibility. A slave terminal process may be initiated by the master terminal process or by another slave terminal process.
In accordance with another aspect of the invention, the step of initiating slave terminal processes to accomplish hardware element reconfiguration further comprises the steps of determining, based upon

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method and apparatus for compound hardware configuration... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and apparatus for compound hardware configuration..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for compound hardware configuration... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2901898

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.