Electrical computers and digital data processing systems: input/ – Input/output data processing – Direct memory accessing
Reexamination Certificate
2005-03-10
2010-06-22
Tsai, Henry W. H. (Department: 2184)
Electrical computers and digital data processing systems: input/
Input/output data processing
Direct memory accessing
C710S028000, C710S107000, C710S240000, C709S212000, C709S245000
Reexamination Certificate
active
07743176
ABSTRACT:
Method and apparatus for communication between hardware blocks configured in a programmable logic device (PLD) and a computation device external to the PLD is described. A bus controller is provided for receiving words from the computation device. Each of the words includes an address component and a data component. A first-in-first-out buffer (FIFO) is configured for communication with the bus controller to store the words. A processing engine is provided having a memory space associated with the hardware blocks and being configured to receive a word at a top of the FIFO. An address decoder is provided for decoding the address component of the word at the top of the FIFO to obtain an address of a memory location in the memory space. A strobe generator is provided for coupling a strobe signal to the processing engine. The strobe signal is configured to store the word in the memory location.
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Schumacher Paul R.
Turney Robert D.
Brush Robert M.
Maunu LeRoy D.
Sun Michael
Tsai Henry W. H.
Xilinx , Inc.
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