Electrical computers and digital data processing systems: input/ – Input/output data processing – Flow controlling
Reexamination Certificate
1998-11-03
2001-08-07
Lee, Thomas (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Flow controlling
C709S228000, C709S245000
Reexamination Certificate
active
06272563
ABSTRACT:
FIELD OF THE INVENTION
The present invention pertains to the field of computer systems. More particularly, this invention pertains to the field of communicating between devices in a computer system.
BACKGROUND OF THE INVENTION
Prior computer systems typically rely on standardized busses, such as the Peripheral Component Interconnect (PCI) bus, to allow computer system chipset components to communicate one with another. For example, a transaction originating at a processor and intended for a disk drive might first be delivered to a first chipset component that serves as an intermediary between the processor bus and a PCI bus. The first chipset component would then deliver the transaction over the PCI bus to a second system chipset component which would then deliver the transaction to the disk drive.
Busses such as the PCI bus also provide for communication with other computer system devices such as graphics controllers and network adapters. Because busses such as the PCI bus must interface with a variety of component types, each with varying requirements, they are not necessarily optimized for allowing communication between chipset components. Further, chipset manufacturers who rely on standardized busses such as the PCI bus must adhere to bus standards in order to ensure compatibility with other components, and are not at liberty to make substantial changes in how the chipset components communicate with each other. Another issue that faces chipset component manufacturers in designing and manufacturing chipset components is the need to conform to standardized supply and signaling voltages when relying on busses such as PCI for communication between chipset components, thereby locking the manufacturers into certain design practices and manufacturing technologies.
Prior computer systems that rely on standardized busses such as PCI for communication between chipset components also typically have no mechanism for communicating that a particular transaction is isochronous and should be handled in a manner that will ensure an adequate level of quality of service.
SUMMARY OF THE INVENTION
A method and apparatus for communicating routing and attribute information for a transaction between hubs in a computer system is disclosed. The apparatus includes a data path input/output unit to output a packet header for a transaction. The packet header includes a transaction descriptor routing field to identify an initiating agent that initiated the transaction. The transaction descriptor routing field includes a hub identification portion and a pipe identification portion. The hub identification portion identifies a hub that contains the initiating agent. The pipe identification portion further identifies the initiating agent within the identified hub if the transaction has no ordering requirements with respect to a second agent in the identified hub.
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Ajanovic Jasmin
Harriman David J.
Traw C. Brendan S.
Elamin Abdelmoniem
Intel Corporation
Lee Thomas
Wells Calvin E.
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