Method and apparatus for communicating between integrated...

Details Method and apparatus for communicating between integrated... Method and apparatus for communicating between integrated...

2006-09-26

2006-09-26

Thai, Tuan V. (Department: 2186)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S154000, C710S107000, C713S320000

Reexamination Certificate

active

07114038

ABSTRACT:
For one embodiment, a computer system includes both high power and low power buses coupling a processor to a controller. When the processor is in a high power mode, its cache is snooped by the controller via the high power bus. When the processor is in a low power mode, its cache is snooped by the controller via the low power bus.

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