Electrical computers and digital data processing systems: input/ – Interrupt processing – Programmable interrupt processing
Patent
1998-06-25
2000-05-16
Follansbee, John A.
Electrical computers and digital data processing systems: input/
Interrupt processing
Programmable interrupt processing
710 48, 709102, G06F 946
Patent
active
060650893
ABSTRACT:
A method and apparatus for generating an interrupt signal. A counter value is decremented each time a task is completed by a slave processor. The counter value is incremented each time a task is read by the slave processor. A delay value is set using the counter value. An interrupt is generated after a period of time set by the delay value has passed. The counter value is compared to a threshold value. The interrupt is generated upon detecting a condition in which the counter value is less than the threshold value or when the completion queue is full instead of after the period of time.
REFERENCES:
patent: 3905025 (1975-09-01), Davis et al.
patent: 5317745 (1994-05-01), Chan
patent: 5404536 (1995-04-01), Ramakrishnan et al.
patent: 5437039 (1995-07-01), Yuen
patent: 5535380 (1996-07-01), Bergkvist, Jr. et al.
patent: 5568649 (1996-10-01), MacDonald et al.
patent: 5727227 (1998-03-01), Schmidt et al.
Hickerson Roger
McCombs Craig C.
Follansbee John A.
LSI Logic Corporation
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