Method and apparatus for clock signal performance measurement

Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis

Reexamination Certificate

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C713S503000

Reexamination Certificate

active

06983394

ABSTRACT:
Method and apparatus for providing a measure of jitter and skew of a clock signal is described. The clock signal may be used as an input to a digital circuit. In one embodiment, a digital delay circuit is used in conjunction with a processing circuit to continuously measure the jitter of an input clock signal, thus providing clock signal performance measurement over time. In another embodiment, a pair of digital delay circuits are used to continuously measure the skew or delay between a reference clock signal and a input clock signal, thus providing a measurement of the skew of the input clock signal over time. The digital delay circuit(s) are formed on-chip, and thus an on-chip determination of jitter or skew may be provided.

REFERENCES:
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patent: 5889435 (1999-03-01), Smith et al.
patent: 6374361 (2002-04-01), Lee et al.
patent: 6470483 (2002-10-01), Rodriguez et al.
patent: 6779123 (2004-08-01), Simon et al.

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