Method and apparatus for clock recovery and data qualification

Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction

Reexamination Certificate

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Details

C375S371000, C375S372000, C375S373000, C375S374000, C375S375000, C375S376000

Reexamination Certificate

active

06853696

ABSTRACT:
A system for recovering a clock signal from a data signal is described. The system uses an oscillator adapted to generate an oscillator output signal, a first detecting circuit for obtaining a coarse frequency-lock condition between the data signal and a recovered clock signal, a second detecting circuit for obtaining a phase-locked condition between the data signal and the recovered clock signal, a lock-detecting circuit responsive to the first detecting circuit for detecting an out-of-lock condition between the data signal and the recovered clock signal, and a control circuit responsive to the lock-detecting circuits and adapted to control the oscillator to generate an oscillator output signal on the basis of the first detecting circuit during an out-of-lock condition, and otherwise to generate the oscillator output signal on the basis of the second detecting circuit. The advantages include a much wider pull-in range for frequency acquisition, and an accurate and robust measure of a quality of received data.

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