Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2005-11-01
2005-11-01
Le, Dieu-Minh (Department: 2114)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S045000
Reexamination Certificate
active
06961875
ABSTRACT:
A trace array having M entries with corresponding M addresses is used to store the states of input signals. The M addresses of the trace array are sequenced with a counter that counts a clock beginning at a starting count and counting to an ending count. If the ending count is exceeded, the counter starts over at the starting count. The counter outputs are decoded to addresses of the trace array. An event signal is generated on the occurrence of an operation of interest and the counter is started and stopped in response to sequences of the event signals, thus starting and stopping the recording of states of the input signals in the trace array. When an error or particular condition signal occurs, traces corresponding to the input signals are saved in the trace array. A start signal enables tracing and event logic generates event sequence signals which alternately start and stop the recording of traces. The event sequences are programmed by inputs to enable guaranteed statistical chances of capturing states of the input signals corresponding to a particular event signal occurring before an error or another event signal.
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Floyd Michael Stephen
Sinharoy Balaram
Frankeny Richard F.
Le Dieu-Minh
Salys Casimer K.
Winstead Sechrest & Minick P.C.
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