Boots – shoes – and leggings
Patent
1993-11-30
1996-05-28
Trans, Vincent N.
Boots, shoes, and leggings
364488, G06F 1750
Patent
active
055218342
ABSTRACT:
A method and apparatus for approximating power dissipation using a computer-assisted engineering (CAE) system. Initially, a determination is made of the capacitive load for each cell in a netlist for the CMOS circuit, preferably from cell library data sheets. In addition, the capacitive loads of the interconnects between stages are estimated. A switching rate for each cell is then calculated using one of two alternative methods. The first method assumes that the patterns of input signals are statistically independent, and thus estimates the switching rate from the structure of the cell and the switching rates of the inputs. The second method uses known information concerning the relative times when the input signals are high or low to determine the switching rate of the cell. Once the switching rate is known, the output frequency for the cell can be determined. The power dissipation for each cell is then calculated by multiplying the output frequency by the capacitive load. The dynamic power dissipation for the circuit is determined by summing the power dissipation terms for each of the cells making up the netlist.
REFERENCES:
patent: T935003 (1975-06-01), Linville et al.
patent: 4698760 (1987-10-01), Lembach et al.
patent: 5349542 (1994-09-01), Brasen et al.
"Estimation of Power Dissipation in CMOS Combinational Circuits" by S. Devadas et al., IEEE Custom Integrated Circuits Conferences, 1990, pp. 19.7.1-19.7.6.
"Synchronous Path Analysis in MOS Circuit Simulator" by V. D. Agrawal, IEEE 19th Design Automation Conference, 1982, pp. 629-635.
J. Mavor et al., Introduction to MOS LSI Design, chapters 2.9, 2.10, 3.6 and 3.7, Addison-Wesley Publishers Limited, 1983, pp. 41-49 and 79-85.
Blinne Richard D.
Crafts Harold S.
AT&T Global Information Solutions Company
Bailey Wayne P.
Foote Douglas S.
Hyundai Electronics America
Symbios Logic Inc.
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