Electrical computers and digital processing systems: memory – Address formation – Address mapping
Reexamination Certificate
2006-12-05
2006-12-05
Lane, Jack A. (Department: 2185)
Electrical computers and digital processing systems: memory
Address formation
Address mapping
C711S119000, C711S141000, C709S216000, C709S245000
Reexamination Certificate
active
07146484
ABSTRACT:
A caching storage method and system that includes one or more host devices, network devices, storage devices, and logical volume management functions. An input/output (I/O) request is received from the host device that includes a logical block address. The logical block address is translated into an original storage address for a storage device that includes an original storage ID, storage unit ID and block address. It is determined if a cache is defined for the storage device. The original storage address is translated into an address for a cache associated with the storage device if the cache is defined for the storage device. A read request or a write request is sent to the cache address based on the I/O request. Block data is received or transferred from/to the cache defined for the storage device identified by the original storage ID and storage unit ID.
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