Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2005-07-12
2005-07-12
Padmanabhan, Mano (Department: 2188)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C711S003000, C711S118000, C711S156000, C710S054000, C710S056000, C710S057000
Reexamination Certificate
active
06918005
ABSTRACT:
A method and apparatus are provided for caching free cell pointers pointing to memory buffers configured to store data traffic of network connections. In one example, the method stores free cell pointers into a pointer random access memory (RAM). At least one free cell pointer is temporarily stored into internal cache configured to assist in lowering a frequency of reads from and writes to the pointer RAM. A request is received from an external integrated circuit for free cell pointers. Free cell pointers are sent to queues of the external integrated circuit, wherein each free cell pointer in a queue is configured to become a write cell pointer. At least one write cell pointer and a corresponding cell descriptor is received from the external integrated circuit. Free cell pointer counter values are then calculated in order to keep track of the free cell pointers.
REFERENCES:
patent: 6487202 (2002-11-01), Klausmeier et al.
patent: 6549992 (2003-04-01), Armangau et al.
patent: 6618390 (2003-09-01), Erimli et al.
patent: 2002/0194436 (2002-12-01), McKenney
Cole Philip D.
Marchant Nils
Network Equipment Technologies Inc.
Padmanabhan Mano
Song Jasmine
Townsend and Townsend / and Crew LLP
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