Method and apparatus for bus arbitration capable of...

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation

Reexamination Certificate

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C711S151000

Reexamination Certificate

active

07093045

ABSTRACT:
A bus arbitration apparatus includes a storage, a priority order determiner, and an arbitrator. The storage stores a plurality of selection signals for specifying a priority order against a number N of requests. The priority order determiner causes the storage to output one of the plurality of selection signals in a predetermined sequence in response to a demand for arbitration. The arbitrator performs an arbitration operation based on the priority order against the number N of requests specified by one of the plurality of selection signals which is output from the storage.

REFERENCES:
patent: 4536839 (1985-08-01), Shah et al.
patent: 4858101 (1989-08-01), Stewart et al.
patent: 5583999 (1996-12-01), Sato et al.
patent: 6029219 (2000-02-01), Michizono et al.
patent: 6073132 (2000-06-01), Gehman
patent: 6133760 (2000-10-01), Benschneider
patent: 6708248 (2004-03-01), Garrett et al.

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