Method and apparatus for block data transfer to reduce...

Computer graphics processing and selective visual display system – Computer graphics display memory system – Plural storage devices

Reexamination Certificate

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Details

C345S558000, C382S268000

Reexamination Certificate

active

06348925

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to computer graphics systems and more particularly to a transfer method to reduce on-chip storage requirements for interpolative video resizing.
2. Description of the Related Art
Video resizing has become an essential feature in graphics and multi-media adapters for video monitoring and playback applications. Video resizing implies either upscaling or downscaling video frames of an image to a desired size. The video frames may come from either a real-time or a non real-time source. A real-time source includes a compact disk read-only-memory (CD-ROM), a hard disk storage or a network connected to a computer where the data is received in burst mode (i.e., video conferencing).
A video camera or VCR provides an uncompressed video signal that can be displayed on a TV monitor. If a National Television Standards Committee (NTSC) compliant video signal is decoded and digitized, it will have a square pixel resolution of 640×480 pixels/frame. The frame in the signal is constructed from two interlaced fields of 240 lines each. The fields are updated at 60 Hz to produce a smooth motion on the display. When the video signal is decoded to its components, it produces pixels in YUV color space which can be easily converted into RGB color space through a linear transformation.
A great amount of storage space is required to store a video signal after digitization. For example, 27 MBytes of storage are needed to store one second of RGB data of a digitized video signal. Therefore to save storage space, digitized signals are often compressed (usually by a factor of 10 to 50) before being stored on a CD-ROM or a hard disk storage. Often times, the video frames are scaled down before compression to further save storage space. The process of digitizing, downscaling, compressing and storing the video data is known as a capture operation. The reverse operation is called a playback operation.
Accordingly, a playback operation involves decompressing the video data, converting the data from YUV to RGB color space and scaling the decompressed image to the desired size (resizing) on the display screen. To perform the resizing operation, bilinear filtering is often used. Bilinear filtering is computationally intensive and is usually implemented in hardware as part of the graphics chip or as a separate video accelerator chip. The following linear interpolation algorithm is used in bilinear filtering:
0
1
=RF*p
2
+(1−
RF
)*
p
1
;
0
2
=2
RF*p
2
+(1−2
RF
)*
p
1
;
0
3
=3
RF*p
2
+(1−3
RF
)*
p
1
;
0
4
=4
RF
where the resize factor
(
RF
)
=
(
source



image



size
-
1
)
(
target



image



size
-
1
)
;
p
1
, p
2
, . . . are pixels of the original image; and
0
1
,
0
2
, . . . are pixels of the resized image. Bilinear filtering corresponds to performing the linear interpolation in both vertical and horizontal directions.
Bilinear filtering may be used for upscaling as well as downscaling video images; although it is used mostly to upscale video images in playback operation. When bilinear filtering is used to upscale an image, RF is always less than one. When the values of RF multiples (e.g., 2RF, 3RF etc.) in the above equations become greater than one (e.g., 1.2), then only the fractional values are used (e.g., 0.2) in conjunction with the next pixel (p
3
) and the current pixel (p
2
) to generate the pixels in the resized image, the old pixel (p
1
) is discarded.
FIG. 1
depicts a bilinear filter
100
used in the prior art to resize video images. The bilinear filter
100
contains a vertical filter
110
connected to a vertical memory
120
. The vertical filter is also connected to a buffer
130
which is further connected to a horizontal filter
140
. The vertical filter
110
is used to expand the image vertically. Similarly, the horizontal filter
140
is used to expand the image horizontally. The vertical memory
120
typically has a capacity to store at least one scan line of pixels (768×3 bytes). The buffer
130
need only have a two-pixel storage capacity; however, to decrease the time required to acquire each new pixel, the buffer is usually provided with a three-pixel storage capacity.
During a video playback, a frame of video image pixels is scanned line by line from top to bottom and input into the bilinear filter. As the first line of video image is scanned, it is stored into the vertical memory
120
. When the next line is scanned in, the vertical filter generates the intermediate lines by interpolating between the two lines of pixels. The filter
110
then replaces the previously stored line of pixels in the vertical filter memory
120
with the current scan line for further interpolation. The first line, ordinarily referred to as an anchor line, and the last line as well as all vertically interpolated scan lines are passed on to the horizontal filter. The process continues until the whole frame is vertically expanded.
When the first line of pixels is scanned into the vertical filter
110
, it is also transmitted to the buffer
130
. As the pixels are transferred to buffer
130
, the horizontal filter
140
interpolates between every two pixels stored in the buffer
130
. This process is repeated for each line of pixels received from the vertical filter
110
. Consequently, a resized or scaled up version of the input image is produced at the video output.
The method of transferring lines of pixels of a frame into the bilinear filter
100
dictates that a memory device of 768×3 bytes (or 768 pixels of 24 bits each) of storage capacity be provided. This amount of storage requirement uses a great portion of the real estate of the die of the video accelerator chip which directly affects the chip's overall cost.
Thus, there is a need in the art for a transfer method that requires only a minimal amount of storage capacity in the video accelerator chip when an image is being expanded.
SUMMARY OF THE INVENTION
The need in the art is addressed by the present invention. The present invention provides a method and apparatus for transferring a video image to an accelerator chip of a display adapter such that the storage capacity of a memory device in the chip is greatly reduced. First, frames of the video data are divided into arrays of data elements. Then, the arrays are transferred one row at a time. Thus, the row of the arrays rather than lines of pixels of frames are stored in the memory device for processing. Consequently, since the rows of the arrays have a smaller number of data elements than the lines of the frames, memory devices having less storage capacity may be used in the chip.


REFERENCES:
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patent: 5229864 (1993-07-01), Moronaga et al.
patent: 5355328 (1994-10-01), Arbeiter et al.
patent: 5406306 (1995-04-01), Siann et al.
patent: 5410616 (1995-04-01), Kidd
patent: 5438654 (1995-08-01), Drebin et al.
patent: 5469222 (1995-11-01), Sprague
patent: 5801776 (1998-09-01), Tamura et al.
patent: 6005546 (1999-12-01), Keene
patent: 6028589 (2000-02-01), Mehra et al.
patent: 6191772 (2001-02-01), Mical et al.

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