Method and apparatus for bit stream synchronization

Details Method and apparatus for bit stream synchronization Method and apparatus for bit stream synchronization

1993-06-07

1995-06-13

Coles, Sr., Edward L.

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

375377, 370 84, H04L 700, H04L 2300, H04J 322

Patent

active

054250617

ABSTRACT:
A data processing system (10) is described which comprises an integrated decoder circuit (12) comprising an input buffer (14) and an error signal generator circuit ( 18 ) . The error signal generator circuit ( 18 ) generates a pulse width modulated error signal output to a clock processing circuit (20). The clock processing circuit (20) may comprise a low pass filter (24) and a variable oscillator (26). The clock processing circuit (20) supplies a clock signal to a digital-to-analog converter (16). The digital-to-analog converter (16) uses the clock signal to correctly track the bit rate for the encoded bit stream received by decoder system (12).

REFERENCES:
patent: 5122875 (1992-06-01), Raychaudhuri et al.
patent: 5162746 (1992-11-01), Ghoshal
patent: 5276688 (1994-01-01), Urbansky
patent: 5297172 (1994-03-01), Shenoy et al.
patent: 5297180 (1994-03-01), Upp et al.
patent: 5313502 (1994-05-01), Nawrocki et al.
patent: 5321717 (1994-06-01), Bonnet et al.
patent: 5327430 (1994-07-01), Urbansky

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