Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2006-03-07
2006-03-07
Elmore, Stephen C. (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S125000, C711S144000, C711S154000, C711S156000
Reexamination Certificate
active
07010648
ABSTRACT:
A cache pollution avoidance unit includes a dynamic memory dependency table for storing a dependency state condition between a first load instruction and a sequentially later second load instruction, which may depend on the completion of execution of the first load instruction for operand data. The cache pollution avoidance unit logically ANDs the dependency state condition stored in the dynamic memory dependency table with a cache memory “miss” state condition returned by the cache pollution avoidance unit for operand data produced by the first load instruction and required by the second load instruction. If the logical ANDing is true, memory access to the second load instruction is squashed and the execution of the second load instruction is re-scheduled.
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Balakrishnan Vijay
Kadambi Sudarshan
Elmore Stephen C.
Gunnison McKay & Hodgson, L.L.P.
McKay Philip J.
Sun Microsystems Inc.
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