Data processing: generic control systems or specific application – Specific application – apparatus or process – Product assembly or manufacturing
Reexamination Certificate
1997-06-09
2001-03-13
Grant, William (Department: 2121)
Data processing: generic control systems or specific application
Specific application, apparatus or process
Product assembly or manufacturing
C700S099000, C700S101000, C700S102000, C700S121000, C118S719000, C414S217000, C414S222010, C414S225010
Reexamination Certificate
active
06201999
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a multiple chamber wafer processing tool and, more particularly, to a method and apparatus for automatically generating a schedule(s) for a semiconductor wafer within a multiple chamber semiconductor wafer processing tool.
2. Description of the Background Art
Semiconductor wafers are processed to produce integrated circuits using a plurality of sequential process steps. These steps are performed using a plurality of process chambers. An assemblage of process chambers served by a wafer transport robot is known as a multiple chamber semiconductor wafer processing tool or cluster tool.
FIG. 1
depicts, in part, a schematic diagram of an illustrative cluster tool known as the Endura® System manufactured by Applied Materials, Inc. of Santa Clara, Calif.
The cluster tool
100
contains, for example, four process chambers
104
,
106
,
108
,
110
, a transfer chamber
112
, a preclean chamber
114
, a buffer chamber
116
, a wafer orienter/degas chamber
118
, a cooldown chamber
102
, and a pair of loadlock chambers
120
and
122
. Each chamber represents a different stage or phase of semiconductor wafer processing. The buffer chamber
116
is centrally located with respect to the loadlock chambers
120
and
122
, the wafer orienter/degas chamber
118
, the preclean chamber
114
and the cooldown chamber
102
. To effectuate wafer transfer amongst these chambers, the buffer chamber
116
contains a first robotic transfer mechanism
124
. The wafers
128
are typically carried from storage to the system in a plastic transport cassette
126
that is placed within one of the loadlock chambers
120
or
122
. The robotic transport mechanism
124
transports the wafers
128
, one at a time, from the cassette
126
to any of the three chambers
118
,
102
, or
114
. Typically, a given wafer is first placed in the wafer orienter/degas chamber
118
, then moved to the preclean chamber
114
. The cooldown chamber
102
is generally not used until after the wafer is processed within the process chambers
104
,
106
,
108
,
110
. Individual wafers are carried upon a wafer transport blade
130
that is located at the distal end of the first robotic mechanism
124
. The transport operation is controlled by a sequencer
136
.
The transfer chamber
112
is surrounded by and has access to the four process chambers
104
,
106
,
108
and
110
as well as the preclean chamber
114
and the cooldown chamber
102
. To effectuate transport of a wafer amongst the chambers, the transfer chamber
112
contains a second robotic transport mechanism
132
. The mechanism
132
has a wafer transport blade
134
attached to its distal end for carrying the individual wafers. In operation, the wafer transport blade
134
of the second transport mechanism
132
retrieves a wafer from the preclean chamber
114
and carries that wafer to the first stage of processing, for example, a physical vapor deposition (PVD) stage within chamber
104
. Once the wafer is processed and the PVD stage deposits material upon the wafer, the wafer can then be moved to a second stage of processing and so on.
Once processing is complete within the process chambers, the transport mechanism
132
moves the wafer from the process chamber and transports the wafer to the cooldown chamber
102
. The wafer is then removed from the cooldown chamber using the first transport mechanism
124
within the buffer chamber
116
. Lastly, the wafer is placed in the transport cassette
126
within the loadlock chamber
122
.
More generally, a cluster tool contains n chambers, denoted by C
1
, C
2
, . . . , C
n
, one or more transfer chambers (robots)
112
and
116
, and one or more loadlocks
120
and
122
. The exact arrangement of chambers, robots and loadlocks is referred to as the “configuration” of the tool. A wafer W
a
to be processed is taken from a loadlock, placed successively into various chambers as each chamber performs a particular process upon the wafer.
A wafer's trace is the trajectory of a particular wafer through the cluster tool; that is, a trace is the order in which chambers are visited by a wafer (not necessarily C
i+1
after C
i
). This should be distinguished from the term “processing sequence” which is the order of applying processes (recipes) to a wafer. If more than one chamber performs the same process (parallel chambers), a given processing sequence may be satisfied by several different traces.
A wafer which completes its processing sequence and is returned to the loadlock is said to be processed by the tool. Roughly speaking, a tool's throughput is the number of wafers processed by the tool per unit of time. That is, if the tool needs t seconds to process nt wafers, then
S
t
:=
n
t
t
(
3
)
is the tool's throughput measured in the interval [0,t].
There are many ways to improve the tool's throughput for a given processing sequence. However, one important improvement is to use efficient scheduling routines for a given processing sequence.
The optimization of scheduling involves the choice of criteria used in deciding when to transfer a wafer from one chamber into the next (and which wafers should be moved, if any, prior to that move). A routine which schedules the movement of wafers through the cluster tool (based on a given processing sequence) is referred to as a “scheduling routine.”
The steady-state throughput of a tool under scheduling routine A is denoted by S(A). If n>1 then, depending on a given processing sequence, one may consider a number of scheduling routines that fulfill the processing sequence. The routine which maximizes the value of throughput is deemed the “optimum” routine and the maximum attainable value of throughput is known as the tool's “capacity.” That is, if A is the set of all possible scheduling routines for a given processing sequence, then A* is optimum if
S(A*)=max{S(A)|A&Egr;A} (4)
Clearly, the tool's capacity S(A*) depends on a given processing sequence as well as on chamber and robot parameters within the processing sequence. The problem of finding efficient scheduling routines for a given processing sequence (especially, finding optimum routines, where possible) is of considerable practical importance.
Presently there is not an automatic method of determining the best schedule, given a particular trace, that provides the highest throughput for that trace. Typically, a trial and error method is used until a schedule is determined that provides a sufficient throughput. However, the sufficient throughput may not be the best throughput that is possible for a given trace.
Therefore, a need exists in the art for a method and apparatus that determines all possible schedules given a particular trace and, using a throughput modeling program determines the throughput for each of the possible schedules and selects a schedule for use within a cluster tool that provides the maximum throughput for the given trace.
SUMMARY OF THE INVENTION
The disadvantages heretofore associated with the prior art are overcome by an invention of a method and apparatus for determining all possible schedules that accomplish a given trace, applying a throughput model to each of the schedules, and determining the schedule or schedules that result in the highest throughput.
More specifically, the invention uses a set of deterministic rules to compute the various schedules. First, a schedule is defined as a series of “letters” that form a “word”. Each letter in the word defines a possible positioning of wafers within a cluster tool. Of course, the positioning of the wafers within the tool must fulfill the trace, i.e., each letter must follow from a predecessor letter in accordance with a particular set of rules that define the trace.
Given a letter (input letter) representing present wafer positions, the invention computes all possible successor wafer positions, i.e., all possible valid successor letters, as well as the total number of successors for t
Applied Materials Inc.
Grant William
Patel Ramesh
Thomason Moser & Patterson
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