Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
Reexamination Certificate
1995-12-29
2003-05-20
Gossage, Glenn (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Memory configuring
C711S005000, C711S105000, C711S167000, C365S230030, C365S233100
Reexamination Certificate
active
06567904
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to the field of computer systems. Specifically, the present invention relates to automatically detecting whether a memory unit is unpopulated or populated with synchronous or asynchronous memory devices.
2. Description of Related Art
Ease of use is an increasingly important goal in computer system design. For example, it is desirable for a computer system to be capable of automatically detecting changes in the computer system hardware, and configuring itself to work properly in response to detecting those changes. In this manner, computer system users do not have to perform complex set-up routines, or understand technical details relating to each aspect of their computer system. Further, automatic detection and integration capabilities provide computer system manufacturers with additional flexibility to more easily interchange hardware components, and to provide different system configurations without a requirement for significant design changes.
The computer system main memory array, for example, has many possible configurations due to the wide variety of memory device types and storage capacities available. Memory devices are frequently interchanged or added to the computer system main memory array to improve system performance or to run larger software programs. Further, computer system designers may vary the configuration of the main memory array in similar computer systems to meet desired price-performance targets. In this case, it is advantageous for the computer system designers or manufacturers to be able to use the same memory interface components independent of the types of memory devices in the memory array, while ensuring that the computer system takes advantage of the performance capabilities of higher performance memory.
Main memory arrays are typically formed of dynamic random access memories (DRAMs) arranged in rows or groups referred to herein as “memory units”. The term “memory unit location” is used herein to refer to the physical location of a memory unit or an area which is configured to receive memory devices for the main memory array, but is unpopulated. Several different types of DRAMs are now available including well-known asynchronous DRAMs such as fast page mode (FP) and extended data out (EDO) DRAMs. Automatic memory device type detection and integration for such asynchronous DRAMs is the subject of a copending application entitled “A Method and Apparatus for Integrating and Determining Whether a Memory Subsystem is Installed with Standard Page Mode Memory or an Extended Data Out Memory”, Ser. No. 08/348,365, filed Nov. 30, 1994 and assigned to the assignee of the present invention now abandoned in favor of continuation application Ser. No. 08/821,705, filed Mar. 19, 1997.
Also available is one of the newest types of DRAMs referred to as synchronous DRAM or SDRAM. SDRAM devices provide a significant increase in performance over EDO and FP DRAMs due to their memory access timing characteristics, but are also more expensive than the above-mentioned asynchronous devices.
Due to the increasing complexity of software applications as well as the demand by computer system users for higher performance machines, it is desirable for computer systems to be able to reliably integrate SDRAMs into the main memory array, either alone or in combination with other types of memory devices. Further, where SDRAM devices are used, it is important that the computer system is able to take advantage of the SDRAM performance benefits in order to provide a good return on the additional investment over lower performance asynchronous memory device types.
SDRAM devices require different memory access control signals and thus, a different memory interface than asynchronous DRAM devices. For this reason, some computer systems do not support operation with SDRAM devices in the main memory array.
Other computer systems may provide an interface for SDRAM memory accesses, but present other issues. For example, in some computer systems, the performance of the main memory array is limited by the lowest performance devices, such that there is no advantage to mixing high and low performance memory devices in the same memory array. In other computer systems, it is necessary for the computer system user to set hardware switches, or otherwise provide input to the computer system to indicate the types of memory devices in each row or memory unit of the main memory array. This approach can be problematic however, if the person setting the switches or providing the input to the computer system for configuration does not know what types of memory devices are installed in the computer system, or how to distinguish between the different types of memories available. In this case, the computer system may become unreliable if the hardware switches or other manual configuration mechanism is set incorrectly.
Thus, it is desirable to have a means for automatically detecting the type of memory devices in each memory unit location of the main memory array, including both asynchronous memory device types such as FP DRAMs and EDO DRAMs, as well as synchronous memory device types including SDRAMs. Further, it is desirable to be able to automatically configure the computer system such that the signals for performing memory accesses to each memory unit in the main memory array meet the timing requirements of the memory device type in each specific memory unit location for high performance memory accesses, whether the devices are synchronous or asynchronous.
SUMMARY OF THE INVENTION
A method and apparatus for automatically detecting the type of memory devices in a memory unit location, wherein the memory device type may be either asynchronous or synchronous, is disclosed. The memory device type is detected by writing a first data item to the memory device using at least a minimum common asynchronous memory write protocol meeting the write timing requirements of all asynchronous memory device types. An attempt is then made to read the first data from the memory device using a first asynchronous memory read protocol. If the first data is read from the memory device, the memory device is identified as being an asynchronous memory. If the first data is not read from the device, a second data item is written to the memory device using a synchronous memory write protocol. An attempt is then made to read the second data from the memory device using a synchronous memory read protocol. If the second data is read, the memory device is identified as being a synchronous memory device. If the second data is not read, the memory unit is unpopulated.
In one embodiment, a distinction is made between asynchronous fast page mode dynamic random access memories (FP DRAMs), asynchronous extended data out (EDO) DRAMs, synchronous DRAMs (SDRAMs) and unpopulated memory units, and the memory device type of each bank in a memory array is automatically stored in a configuration register such that the computer system is automatically configured to indicate memory device type.
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“Configurations for Solid State Memories,” JEDEC Standard No.
Khandekar Narendra
Kundu Aniruddha
Faatz Cynthia T.
Gossage Glenn
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