Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Reducing an impact of a stall or pipeline bubble
Reexamination Certificate
2009-12-02
2011-11-08
Ellis, Richard (Department: 2183)
Electrical computers and digital processing systems: processing
Dynamic instruction dependency checking, monitoring or...
Reducing an impact of a stall or pipeline bubble
Reexamination Certificate
active
08055884
ABSTRACT:
One embodiment of the present invention provides a system for augmenting a pipeline with a bubble-removal circuit. During operation, the system generates a bubble-removal circuit which determines a clock-enable signal based at least on whether an upstream register has valid data and whether the pipeline is stalled. Next, the system gates the clock signal using the clock-enable signal. The augmented pipeline can determine whether a first register contains invalid data, which is associated with a bubble. Next, the augmented pipeline determines whether a second register contains valid data, wherein the second register is adjacent to and upstream from the first register. If the first register contains invalid data and the second register contains valid data, the augmented pipeline replaces the invalid data of the first register with valid data based on the valid data in the second register without propagating the invalid data to a downstream register.
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Maner, Walter, Unique Ethical Problems in Information Technology, Department of Computer Science, Bowling Green State University, 1996.
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Kobernat Brett
Lofgren John D.
Ellis Richard
Park Vaughan Fleming & Dowler LLP
Sahasrabuddhe Lexman
Synopsys Inc.
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