Boots – shoes – and leggings
Patent
1987-05-01
1990-06-26
Zache, Raulfe B.
Boots, shoes, and leggings
364240, 3642409, 3642435, 3642283, G06F 918, G06F 1516
Patent
active
049377337
ABSTRACT:
A multiple node computer system includes processor nodes, memory nodes, and input/output nodes interconnected on a pended bus. The system includes a lockout indicator which is set upon receipt of a locked response message by a processor node from a memory node in response to an interlock read command. The processors include a lockout check circuit responsive to the condition of the lockout indicator and will restrict generation of additional interlock read commands according to a predetermined access gating criterion until the lockout indicator is reset. In this manner, processor nodes of the system are assured equitable access to a memory node.
REFERENCES:
patent: 3398405 (1968-08-01), Carlson et al.
patent: 3528061 (1970-09-01), Zurcher, Jr.
patent: 3611303 (1971-10-01), Serracchioli et al.
patent: 3701109 (1972-10-01), Peters
patent: 3761883 (1973-09-01), Alvarez et al.
patent: 3916384 (1975-10-01), Fleming et al.
patent: 3947324 (1976-03-01), Doehle et al.
patent: 3993981 (1976-11-01), Cassarino et al.
patent: 3997875 (1976-12-01), Broeren
patent: 4000485 (1976-12-01), Barlow et al.
patent: 4050059 (1977-09-01), Williams et al.
patent: 4055851 (1977-10-01), Jenkins et al.
patent: 4075692 (1978-02-01), Sorenson et al.
patent: 4096561 (1978-06-01), Trinchieri
patent: 4099243 (1978-07-01), Palumbo
patent: 4106104 (1978-08-01), Nitta et al.
patent: 4148011 (1979-04-01), McLagan et al.
patent: 4162529 (1979-07-01), Suzuki et al.
patent: 4214304 (1980-07-01), Shimizu et al.
patent: 4229791 (1980-10-01), Levy et al.
patent: 4296466 (1981-10-01), Guyer et al.
patent: 4313161 (1982-01-01), Hardin et al.
patent: 4373183 (1983-02-01), Means et al.
patent: 4400771 (1983-08-01), Suzuki et al.
patent: 4402040 (1983-08-01), Evett
patent: 4423384 (1983-12-01), DeBock
patent: 4480307 (1984-10-01), Budde et al.
patent: 4481573 (1984-11-01), Fukunaga et al.
patent: 4488217 (1984-12-01), Binder et al.
patent: 4546450 (1985-10-01), Kanuma
patent: 4564838 (1986-01-01), Boulogne et al.
patent: 4568930 (1986-02-01), Livingston et al.
patent: 4574350 (1986-03-01), Starr
patent: 4587609 (1986-05-01), Boudreau et al.
patent: 4594590 (1986-06-01), Van Hatten et al.
patent: 4621318 (1986-11-01), Maeda
patent: 4626843 (1986-12-01), Szeto et al.
patent: 4660169 (1987-04-01), Norgren et al.
patent: 4665484 (1987-05-01), Nanba
patent: 4698753 (1987-10-01), Hubbins et al.
patent: 4706190 (1987-11-01), Bomba et al.
Gillett Jr. Richard B.
Williams Douglas D.
Digital Equipment Corporation
Richman Glenn
Zache Raulfe B.
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