Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2005-12-13
2005-12-13
Bonzo, Bryce P. (Department: 2113)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S044000, C714S056000
Reexamination Certificate
active
06976191
ABSTRACT:
A method, apparatus, and computer instructions for processing errors in a hierarchical input/output sub-system having an input/output bridge with a plurality of hardware devices in a level below the bridge. A value is read from a selected register to form a read value in response to detecting an error. The selected register is reset. Each bit in the read value associated with the error is cleared to form a cleared value. The cleared value is written into the selected register such that errors occurring since the register was cleared are preserved. The error registers below the bridge are scanned in response to an absence of an error being detected in a bridge within the input/output sub-system. A determination is made as to whether the error has previously occurred in response to a presence of an error being found by scanning the registers below the bridge. The error is reported in response to an absence of a determination that the error has previously occurred.
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Kitamorn Alongkorn
Kulkarni Ashwini
McIntosh Gordon D.
Patel Kanisha
Perez Michael Anthony
Maskulinski Michael
McBurney Mark E.
Skarsten James O.
Yee Duke W.
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