Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
Patent
1996-09-26
1999-09-28
Cabeca, John W.
Electrical computers and digital processing systems: memory
Storage accessing and control
Memory configuring
711118, 711127, 711157, G06F 1200, G06F 1300
Patent
active
059604620
ABSTRACT:
A method and apparatus for analyzing the configuration of a computer main memory. A complex memory controller which imposes restrictions on the memory's configuration, determines whether a configuration is consistent with those restrictions. The results of the determination are then reported to the user, the memory controller assesses a memory configuration's compliance with interleave restrictions, memory row size restrictions, and memory speed restrictions. In addition to reporting restriction non-compliance, the memory controller can also assess and report whether a particular configuration is optimal.
REFERENCES:
patent: 5237674 (1993-08-01), Mohme et al.
patent: 5293607 (1994-03-01), Brockmann et al.
patent: 5301278 (1994-04-01), Bowater et al.
patent: 5341486 (1994-08-01), Castle
patent: 5572692 (1996-11-01), Murdoch et al.
Li Yan
Solomon Anthony
Cabeca John W.
Intel Corporation
Thai Tuan V.
LandOfFree
Method and apparatus for analyzing a main memory configuration t does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and apparatus for analyzing a main memory configuration t, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for analyzing a main memory configuration t will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-716364