Method and apparatus for an integrated circuit having...

Electrical computers and digital processing systems: support – Clock control of data processing system – component – or data...

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C713S500000, C327S144000, C327S145000

Reexamination Certificate

active

10794233

ABSTRACT:
A method and apparatus for a integrated circuit having flexible-ratio frequency domain cross-overs. In one embodiment, an integrated circuit has at least three cooperating frequency domains with variable operating frequencies. The integrated circuit includes cross-over logic to allow integral fraction ratio frequency domain cross-overs between more than one pair of frequency domains.

REFERENCES:
patent: 5329471 (1994-07-01), Swoboda et al.
patent: 5471587 (1995-11-01), Fernando
patent: 5577192 (1996-11-01), Niederer et al.
patent: 5596756 (1997-01-01), O'Brien
patent: 5623673 (1997-04-01), Gephardt et al.
patent: 5640573 (1997-06-01), Gephardt et al.
patent: 5781765 (1998-07-01), Alexander
patent: 5802132 (1998-09-01), Pathikonda et al.
patent: 5862373 (1999-01-01), Pathikonda et al.
patent: 5884023 (1999-03-01), Swoboda et al.
patent: 5915107 (1999-06-01), Maley et al.
patent: 5958011 (1999-09-01), Arimilli et al.
patent: 5961649 (1999-10-01), Khandekar et al.
patent: 6047382 (2000-04-01), Maley et al.
patent: 6049887 (2000-04-01), Khandekar et al.
patent: 6112307 (2000-08-01), Ajanovic et al.
patent: 6115827 (2000-09-01), Nadeau-Dostie et al.
patent: 6128758 (2000-10-01), Hall et al.
patent: 6131173 (2000-10-01), Meirlevede et al.
patent: 6154405 (2000-11-01), Takemae et al.
patent: 6175603 (2001-01-01), Chapman et al.
patent: 6208180 (2001-03-01), Fisch et al.
patent: 6263448 (2001-07-01), Tsern et al.
patent: 6268749 (2001-07-01), Fisch et al.
patent: 6345328 (2002-02-01), Rozario et al.
patent: 6349392 (2002-02-01), Swoboda et al.
patent: 6522985 (2003-02-01), Swoboda et al.
patent: 6760392 (2004-07-01), Tan et al.
patent: 7007187 (2006-02-01), Wilcox et al.
patent: 357100758 (1982-06-01), None
patent: 401166241 (1989-06-01), None
patent: 402253738 (1990-10-01), None
Kim, Sangwoo et al., “Impact of Cross-over Lines on Delay Time of Two Parallel Global Wires”, 8thTopical Meeting on Electrical Performance of Electronic Packaging: Oct. 25-27, 1999, IEEE, pp. 53-56.
Mackenzie, Philip D., “A Separation Between Reconfigurable Mesh Models”, Proceedings of the Seventh International Parallel Processing Symposium, Apr. 13-16, 1993, IEEE, pp. 84-88.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method and apparatus for an integrated circuit having... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and apparatus for an integrated circuit having..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for an integrated circuit having... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3843272

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.