Method and apparatus for an improved stack arrangement and opera

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories

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711110, 711136, G06F 1208

Patent

active

061483761

ABSTRACT:
An apparatus and method for an improved stack comprises an advantageous indexing scheme and stack arrangement allowing more efficient performance of stack operations. The most-recently-used stack item appears at the top of the stack and the least-recently-used item is at the bottom of the stack. Values in between the top and bottom items are ordered from top to bottom with succeedingly less recently used items. An indexing scheme is used to indirectly reference locations of the stack items in the stack. A set of registers is used to reference the locations of the stack items in an embedded memory array. The registers function as pointers to the memory array locations. To promote an item to the top of the stack, the item is identified as the most-recently-used and the contents of the other registers are changed to specify the new locations, e.g. these pointers are shifted down one. Similarly, to insert a new item on to the top of the stack, the pointers are shifted and a new item is written into the memory array location that contains the least-recently-used item.

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George McDaniel, entitled "IBM Dictionary of Computing,"1994,pp. 547 and 643.

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