Method and apparatus for aligning memory write data in a...

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique

Reexamination Certificate

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C711S155000, C712S204000, C712S300000

Reexamination Certificate

active

07051168

ABSTRACT:
There is provided a method for aligning and inserting data elements into a memory based upon an instruction sequence consisting of one or more alignment instructions and a single store instruction. Given a data item that includes a data element to be stored, the method includes the step of aligning the data element in another memory with respect to a predetermined position in the memory, in response to the one or more alignment instructions. A mask is dynamically generated to enable writing of memory bit lines that correspond to the aligned data element. The memory bit lines are written to the memory under a control of the mask. The generating and writing steps are performed in response to the single store instruction.

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Patent Application entitled “Processor Implementation having Unified Scalar and SIMD Datapath,” filed on Aug. 14, 2001.

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