Electrical computers and digital data processing systems: input/ – Intrasystem connection – System configuring
Reexamination Certificate
2005-08-16
2005-08-16
Auve, Glenn A. (Department: 2111)
Electrical computers and digital data processing systems: input/
Intrasystem connection
System configuring
C710S009000
Reexamination Certificate
active
06931468
ABSTRACT:
Techniques are provided for simultaneously addressing multiple devices on a data bus, such as by transmitting over a data bus a single message that is received and processed by multiple devices on the bus. Multiple devices may be simultaneously addressed using the standard bus architecture and protocol, without affecting the operation of other devices on the bus. In particular, a master device may address a first subset of the plurality of devices on the bus using a primary address shared by the first subset of the plurality of devices. The master device may address a second subset of the plurality of devices using a secondary address shared by the second subset of the plurality of devices. The second subset is a subset of the first subset. The master device may then transmit information over the bus to the second subset of the plurality of devices.
REFERENCES:
patent: 6230225 (2001-05-01), Olarig et al.
“The 12C-bus Specification,” Version 2.1, Phillips Semiconductors (Jan. 2000).
“A Tutorial Introduction to HPIB,” Version 4.1, Greg Goebel (Jan. 1999), http://ftp.agilent.com/pub/mpusup/pc/iop/hpibut/ib013toc.html.
Cross Edward A
Smith Robert B.
Winick Bradley D.
Auve Glenn A.
Hewlett--Packard Development Company, L.P.
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